Chip Industry Technical Paper Roundup: Sep. 1

<p>Wafer-scale optical interconnects for LLM training; Rowhammer-based inference attacks; 3D-IC test cases; liquid cooling for 2.5D/3D packages; wafer-scale 2D semi growth; DL-based parameter extraction for 2D transistors; and chip-placement optimization.</p> <p>The post <a href="https://semiengineering.com/chip-industry-technical-paper-roundup-sep-1/">Chip Industry Technical Paper Roundup: Sep. 1</a> appeared first on <a href="https://semiengineering.com">Semiconductor Engineering</a>.</p>