SignatureIP Unveils MesoLink, a Mesochronous Bridge for PCIe/CXL Validation

<p>A PCIe/CXL device under test keeps its native generation, lane width and timing; the FPGA side runs full-rate SerDes. Plug-and-play prototyping and emulation. SANTA CLARA, Calif., Sept. 16, 2026 &#8212; SignatureIP, a pioneer and next-generation scalable Silicon Infrastructure Solutions provider, has announced MesoLink, its new Mesochronous Connectivity Bridge IP core that sits between a PCIe/CXL [&#8230;]</p> <p>The post <a href="https://www.hpcwire.com/off-the-wire/signatureip-unveils-mesolink-a-mesochronous-bridge-for-pcie-cxl-validation/">SignatureIP Unveils MesoLink, a Mesochronous Bridge for PCIe/CXL Validation</a> appeared first on <a href="https://www.hpcwire.com">HPCwire</a>.</p>