Reinforcement Learning Cuts Routing Violations in Dense Chip Layouts (NYU)

<p>Researchers at New York University published a technical paper titled “Routing Dense Layouts with History-Aware Offline Reinforcement Learning using LSTM.” Abstract Excerpt: “Detailed routing remains a dominant runtime bottleneck in physical design due to increasing complexity of design rules. Modern routers can struggle to resolve persistent violations under dense operating conditions. While recent work leverages... <a class="read_more" href="https://semiengineering.com/reinforcement-learning-cuts-routing-violations-in-dense-chip-layouts-nyu/">&#187; read more</a></p> <p>The post <a href="https://semiengineering.com/reinforcement-learning-cuts-routing-violations-in-dense-chip-layouts-nyu/">Reinforcement Learning Cuts Routing Violations in Dense Chip Layouts (NYU)</a> appeared first on <a href="https://semiengineering.com">Semiconductor Engineering</a>.</p>