Impact of Cu Microstructure On The TSV-Induced Residual Stress Within Silicon (Purdue, UCLA)

<p>Researchers at Purdue University and the UCLA published a technical paper titled “Experimental Evidence for the Impact of Copper Microstructure on Residual Stress of Through Silicon Via.” Abstract Excerpt: “Here, we experimentally quantify the impact of Cu microstructure on the TSV-induced residual stress within silicon. A 3-⁢m-diameter TSV array was annealed at 400 °C for... <a class="read_more" href="https://semiengineering.com/copper-grain-structure-influences-stress-around-scaled-tsvs-purdue-ucla/">&#187; read more</a></p> <p>The post <a href="https://semiengineering.com/copper-grain-structure-influences-stress-around-scaled-tsvs-purdue-ucla/">Impact of Cu Microstructure On The TSV-Induced Residual Stress Within Silicon (Purdue, UCLA)</a> appeared first on <a href="https://semiengineering.com">Semiconductor Engineering</a>.</p>