Exclusive: IC design faces wire bonding bottleneck in 2027

Surging AI chip demand continues to outstrip TSMC's advanced packaging capacity. At the same time, massive AI server shipments are driving up demand for CPUs, networking equipment, power management ICs (PMICs), and peripheral silicon, rapidly soaking up traditional packaging capacity. IC design insiders reveal that several outsourced semiconductor assembly and test (OSAT) providers have already warned clients that traditional packaging capacity could face a deficit exceeding 20% by 2027. New capacity cannot be added quickly enough, with the supply of wire bonding equipment emerging as the primary bottleneck.