Below the Waterline

Steve Williams · babnews.org

Most of what gets written about the AI buildout looks up the stack. The GPU, the advanced package, the high-bandwidth memory, the power and the grid. That's where the marquee names are, and it's a real set of constraints. But the layer that may actually govern how fast the world can make chips sits in the other direction, below the fab and below the equipment giants, in a tier of small, specialized, often single-source suppliers that almost no one models. A rating agency has already noticed. In a March report, Moody's concluded that the binding constraint on chip delivery has moved into the upstream supply chain, and that the most significant limits may sit deep below wafer fabrication itself. Start with a keyhole example, because it makes the abstract concrete. A single large wafer fab needs somewhere between thirty and forty thousand valves, each doing a specific job: flow control, isolation, protection. One Taiwanese valve maker that supplies them recently reported seven months of order visibility and orders up 15 percent, riding the AI wave, and noted that if one critical valve fails it doesn't just stop a tool, it threatens process continuity, yield, and plant safety. One mundane component, one small supplier, thousands of units per fab, and a genuine ability to halt production. Now hold that picture and multiply it across every unglamorous input a fab and a tool require. The inversion that answers the question The usual mental model is a hierarchy: materials feed the equipment makers, the equipment makers feed the fabs, the fabs feed the chip designers. Constraint flows downward from demand. What's happening now runs the other way. The wafer-fab-equipment makers, Applied Materials, ASML, Lam Research, Tokyo Electron, KLA, have seen their own delivery lead times roughly double, out past eighteen to thirty weeks. And the reporting on it is explicit that the bottleneck is not in the equipment makers' own hands. It is in their suppliers. The companies that build the machines are now gated by the companies that supply the machines with vacuum valves, pumps, power subsystems, precision optics, and lasers. So the constraint didn't stop at the fab, and it didn't stop at the tool. It relocated one rung further down, into a tier most investors have never named, and that is why new-fab mass production keeps sliding toward late 2027 and 2028 no matter how much capital gets announced. The map of the sub-tier The defining feature of this layer is concentration. These are not competitive markets with a bench of substitutes. They are monopolies and duopolies built on decades of process learning, and they sort into three tiers. The suppliers to the equipment makers. Vacuum valves, the components that isolate and control the vacuum inside every process chamber, are roughly 75 percent held by a single Swiss company, VAT Group. Dry vacuum pumps concentrate in Edwards. The power, flow, and gas-delivery subsystems that surround the chamber sit with MKS Instruments and Advanced Energy. And at the extreme, EUV lithography depends on Carl Zeiss for its optics and Trumpf for its drive laser, each effectively a sole source. When any one of these can't scale, the tool it feeds can't ship, and every fab waiting on that tool waits with it. The materials the fab consumes. Silicon wafers, the literal substrate of every chip, are dominated by two Japanese firms, Shin-Etsu and SUMCO, which together hold more than half the market and a higher share of the premium 300mm wafers that AI logic requires; the top five suppliers account for around 80 percent. Photoresist, the light-sensitive chemistry at the heart of patterning, is roughly 90 percent Japanese, and above 90 percent for the EUV grades. Specialty and rare gases, ultra-high-purity chemicals, CMP slurries, and quartzware fill out the list. And underneath even the wafer sits high-purity quartz, the raw material for the crucibles used to grow silicon ingots, nearly 95 percent of which comes from a single mining district around Spruce Pine, North Carolina, split between two companies. A flood or a fire in one Carolina town is a genuine tail risk to global chip supply, and it has almost nothing to do with semiconductors. The substrate and packaging materials. The build-up film that provides the insulation in advanced chip substrates, ABF, is north of 95 percent supplied by Ajinomoto, better known for food seasoning, feeding a substrate duopoly of Ibiden and Shinko. Moody's specifically flagged substrate as a constraint that could limit chip deliveries through 2027. High-layer copper-clad laminate is already on allocation, and even passives like MLCCs, where Murata leads, can halt a server line as completely as a missing processor. Why it's a ceiling, not a squeeze Concentration alone would be manageable if the concentrated players could scale on demand. The reason this is a structural limit, and the real answer to how the sub-tier further constrains chip supply, comes down to four properties that compound. They are single-sourced. When VAT or Ajinomoto or Shin-Etsu is the supplier, there is no second vendor to call when they run short. Their capacity is not one input to the ceiling; it is the ceiling. They are qualification-gated. You cannot simply swap in an alternative valve, resist, or wafer. Each is qualified into a specific process, and re-qualifying a substitute in a live production line takes months of testing, because a variation that would be invisible anywhere else shows up as yield loss here. That qualification moat is what protects the incumbents, and it's also what makes substitution slow precisely when you'd most want it fast. They under-invest by design. These are, for the most part, small and mid-sized specialists, and they have been whipsawed by every prior semiconductor cycle, boom orders followed by cancellations and idle capacity. Having been burned, they are rationally reluctant to build capacity ahead of a demand signal they have learned not to trust. The bullwhip is written into their balance sheets: the harder the top of the stack pulls, the more cautious the bottom becomes about believing it. That caution is a feature of surviving the cycle, and it caps the ramp. Their lead times stack in series. The delays do not overlap, they add. The subsystem maker's lead time sits inside the equipment maker's, which sits inside the fab's construction schedule, which sits ahead of the packaging house's queue. A seven-month valve backlog, an eighteen-to-thirty-week tool lead time, and a ten-week packaging queue are not the same seven months. They are consecutive, and the total is the sum. Put those four together and you get a supply chain that cannot be accelerated by money past a certain point, because the binding inputs answer to something other than money. You cannot pay a quartz deposit into existing faster, or qualify a new photoresist overnight, or conjure a decade of vacuum-valve process knowledge with a purchase order. The top of the stack runs on capital. The bottom runs on physics, geology, and qualification time, and those do not respond to a bidding war. The honest bounds Two caveats keep this from being a doom loop. First, these suppliers are expanding, just deliberately and on their own timelines, and several have announced capacity additions; the constraint is a matter of pace, not permanent scarcity. Second, the concentration has persisted for decades precisely because it works, ultra-high purity and tight process control are genuinely hard, and the incumbents are very good at them. This is a governor on the speed of the buildout, not a prophecy that it fails. But as a way to read the cycle, it reorders your attention. The flattered numbers are the ones everyone quotes, the trillion-dollar capex, the marquee foundry and accelerator names, the announced fab count. The tell is downstream of all of them and upstream of the chip: the valve backlog, the doubled tool lead time, the wafer duopoly's utilization, the one quarry in Carolina. Those are the gauges that say whether the announced capacity becomes real silicon, and on what schedule. You do not remove a bottleneck. You relocate it. The industry spent this cycle watching the constraint climb the stack, into packaging, into memory, into power. It has been quietly descending the whole time as well, below the fab, below the tools, into the valves and the resist and the quartz, where it is least visible and least responsive to the one thing the buildout has in abundance, which is money.