Three Shortages, One Door

Picture a product that takes two expensive parts. One part is made by a specialist on one side of the world. The other is made by a different specialist somewhere else. Both are brilliant, both are scarce, and both are running flat out. Here's the catch: the product doesn't exist until someone bonds the two parts together, and there's essentially one workshop on earth set up to do the bonding. However fast the two specialists run, the number of finished products that reach customers is set by that one workshop.

That's the AI accelerator, drawn in crayon. Hold the picture. We're going to add resolution to it without changing its shape.

The two parts

The first part is logic: the processor die, built by TSMC on its most advanced nodes. You've seen the numbers. TSMC is expanding 2nm capacity by roughly 22% into mid-2027 and 3nm by around 16%, with capital spending running north of $60 billion this year. The second part is memory: High Bandwidth Memory, or HBM, the stacks of DRAM that sit beside the processor and feed it data fast enough to keep it busy. All three makers, SK Hynix, Samsung, and Micron, have sold out their HBM through 2026. The next generation, HBM4, was pre-sold for the year before most people had heard of it.

Two supply chains. Both real, both expanding, both rationed. The temptation is to file them as two separate shortages, with packaging as a third. That filing is the mistake.

The door

The workshop in the crayon drawing is real. It's called CoWoS, Chip-on-Wafer-on-Substrate, and the bonding surface is a slab of silicon called an interposer. The processor die and the HBM stacks are placed side by side on the interposer and wired together across it. Until that step happens, you don't have an accelerator. You have a tray of logic dies in Taiwan and a tray of memory stacks in Korea, and neither one is a product, neither one is revenue.

So the three shortages aren't parallel. They're in series. Logic feeds the door, memory feeds the door, and the door ships the product. Whichever of the three is tightest sets how many accelerators exist. The other two, however impressive their expansion, pile up as inventory in front of the same step.

Why that reorganizes everything

If packaging is the tightest link, then adding logic capacity doesn't add accelerators. It adds logic dies waiting for a slot. Add HBM capacity and you get memory stacks waiting for the same slot. You can pour more into both ends of the funnel and the flow out the bottom doesn't move, because the bottom isn't logic or memory. It's the joining.

Anyone who has run a factory line knows this in their bones. Line output is set by the slowest station, not the fastest and not the average. You get no credit for a fast station sitting upstream of a slow one. You just build a taller pile in front of the slow one.

The flattered number

Which is why most of the figures in the headlines are the wrong ones to watch. Capex is a wrong number. Wafer starts are a wrong number. Record HBM bookings are a wrong number. Not false, just off the critical path. They all measure how hard the two feeder chains are running, and the feeder chains aren't the constraint.

The number that gates revenue is co-packaged throughput: CoWoS output, measured in wafers per month. That's the meter on the door. Everything upstream of it is work-in-process dressed up as progress. If you only get to watch one figure in this buildout, watch that one, and watch it against demand rather than against last year.

The door is getting wider, and it still isn't enough

Here's the turn that catches people who assume the constraint is quietly resolving. It is getting wider. TSMC plans to roughly double CoWoS capacity toward 260,000 wafers a month by the end of 2028, one of the steepest capacity ramps in its history. Yet the gap still isn't closing quickly, because the job at the door is getting bigger per unit at the same time.

Each new accelerator asks more of the interposer than the last. Dies are growing past 500 square millimeters. Stack counts are climbing as HBM4 arrives with taller stacks and a wider data interface. More memory per accelerator means more area on the interposer, more connections, more of the scarce bonding step consumed per finished part. So packaging-area demand grows faster than the unit count. Doubling the door is not slack in the system; it's roughly the run rate needed to keep the gap from widening. When the interposer itself outgrows the size a wafer can print, the industry's answer is to move the whole assembly onto larger panels, a shift already in development. You do not widen this door cheaply.

The rivers share a mouth, and a headwater

There's a deeper version of the convergence for readers who want it. HBM4 moves its base logic die, the small brain at the bottom of each memory stack, onto TSMC's process. So the memory chain, which we drew as a separate specialist, now routes part of itself through the same foundry that makes the logic. The two rivers were never fully independent. They meet at the mouth, the interposer, and now they share a headwater as well.

The investor read, in one paragraph

The market reads all this capital spending as growth, and growth alone earns a yawn or a warning depending on the mood. The tell that separates real growth from stranded capital is convertibility. Is co-packaged output keeping pace, so the backlog turns into shipped product? Or is it stacking up in front of the door as booked-but-unbuilt demand? That's a control question, and it lives at the packaging step, not on the capex line. It also names who holds the leverage. One customer reportedly holds around 60% of CoWoS capacity, and the top three hold more than 85% of it. The door isn't just narrow. It's spoken for.

The one question the door respects

You don't remove a bottleneck, you relocate it. The industry expanded logic, expanded memory, and in doing so relocated its single revenue valve onto one backend step that both chains must pass through. Three shortages, one door.

So the next time a record capex figure or a sold-out memory line crosses your feed, resist reading it as supply on the way. Ask the only question the door respects: how many finished units cleared it this month? Everything else is a pile waiting for a slot.

It's worth carrying that question one rung out from chips, because the shape isn't unique to silicon. Wherever two scarce inputs can only become a product at a single shared step, that step is the business, and everything else is just how big the pile gets.